EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 191

• Manufacturer Part Number: EP4SGX360FH29C3N
• Description: IC STRATIX IV FPGA 360K 780HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX360FH29C3N

• Number Of Logic Elements/cells: 353600
• Number Of Labs/clbs: 14144
• Total Ram Bits: 22564
• Number Of I /o: 289
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 6: I/O Features in Stratix IV Devices
I/O Structure
February 2011 Altera Corporation
3.3-V I/O Interface
External Memory Interfaces
f
f
f
For more information about I/O registers and how they are used for memory
applications, refer to the
Stratix IV I/O buffers support 3.3-V I/O standards. You can use them as transmitters
or receivers in your system. The output high voltage (V
input high voltage (V
standards specifications defined by EIA/JEDEC Standard JESD8-B with margin when
the Stratix IV V
To ensure device reliability and proper operation, when interfacing with a 3.3-V I/O
system using Stratix IV devices, ensure that you do not violate the absolute maximum
ratings of the devices. Altera recommends performing IBIS simulation to determine
that the overshoot and undershoot voltages are within the guidelines.
When using the Stratix IV device as a transmitter, you can use slow slew rate and
series termination to limit overshoot and undershoot at the I/O pins, but they are not
required. Transmission line effects that cause large voltage deviations at the receiver
are associated with an impedance mismatch between the driver and the transmission
lines. By matching the impedance of the driver to the characteristic impedance of the
transmission line, you can significantly reduce overshoot voltage. You can use a series
termination resistor placed physically close to the driver to match the total driver
impedance to the transmission line impedance. Stratix IV devices support series OCT
for all LVTTL and LVCMOS I/O standards in all I/O banks.
When using the Stratix IV device as a receiver, you can use a clamping diode (on-chip
or off-chip) to limit overshoot, though this is not required. Stratix IV devices provide
an optional on-chip PCI-clamping diode for column I/O pins. You can use this diode
to protect the I/O pins against overshoot voltage.
The 3.3-V I/O standard is supported using bank supply voltage (V
this method, the clamping diode (on-chip or off-chip), when enabled, can sufficiently
clamp overshoot voltage to within the DC and AC input voltage specifications. The
clamped voltage can be expressed as the sum of the supply voltage (V
diode forward voltage.
For more information about the absolute maximum rating and maximum allowed
overshoot during transitions, refer to the
Devices
In addition to the I/O registers in each IOE, Stratix IV devices also have dedicated
registers and phase-shift circuitry on all I/O banks for interfacing with external
memory interfaces.
For more information about external memory interfaces, refer to the
Interfaces in Stratix IV Devices
chapter.
CCIO
voltage is powered by 3.0 V.
IH
), and input low voltage (V
External Memory Interfaces in Stratix IV Devices
chapter.
DC and Switching Characteristics for Stratix IV
IL
) levels meet the 3.3-V I/O
OH
), output low voltage (V
Stratix IV Device Handbook Volume 1
CCIO
External Memory
CCIO
) at 3.0 V. In
chapter.
) and the
OL
6–19
),