EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 391

• Manufacturer Part Number: EP4SGX360FH29C3N
• Description: IC STRATIX IV FPGA 360K 780HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX360FH29C3N

• Number Of Logic Elements/cells: 353600
• Number Of Labs/clbs: 14144
• Total Ram Bits: 22564
• Number Of I /o: 289
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Dedicated Remote System Upgrade Circuitry
Dedicated Remote System Upgrade Circuitry
Figure 10–25. Remote System Upgrade Circuit Data Path
Note to
(1) The RU_DOUT, RU_SHIFTnLD, RU_CAPTnUPDT, RU_CLK, RU_DIN, RU_nCONFIG, and RU_nRSTIMER signals are internally
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controlled by the ALTREMOTE_UPDATE megafunction.
Figure
RU_DOUT
10–25:
dout
Status Register (SR)
This section describes the implementation of the Stratix IV remote system upgrade
dedicated circuitry. The remote system upgrade circuitry is implemented in hard
logic. This dedicated circuitry interfaces to the user-defined factory and application
configurations implemented in the Stratix IV device logic array to provide the
complete remote configuration solution. The remote system upgrade circuitry
contains the remote system upgrade registers, a watchdog timer, and a state machine
that controls those components.
Figure 10–25
Bit [4..0]
[4..0]
RU_SHIFTnLD
capture
Shift Register
din
shows the data path for the remote system upgrade block.
RU_CAPTnUPDT
dout
Control Register
Update Register
Logic Array
Bit [37..0]
[37..0]
[37..0]
Logic Array
clkout
Logic Array
(Note 1)
capture
capture
update
RU_CLK
clkin
din
update
RU_DIN RU_nCONFIG
Internal Oscillator
Machine
State
RSU
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time-out
RU_nRSTIMER
Watchdog
Timer
User
10–57