EP4SGX360FH29C3N Altera, EP4SGX360FH29C3N Datasheet - Page 401

no-image

EP4SGX360FH29C3N

Manufacturer Part Number
EP4SGX360FH29C3N
Description
IC STRATIX IV FPGA 360K 780HBGA
Manufacturer
Altera
Series
Stratix® IV GXr

Specifications of EP4SGX360FH29C3N

Number Of Logic Elements/cells
353600
Number Of Labs/clbs
14144
Total Ram Bits
22564
Number Of I /o
289
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP4SGX360FH29C3N
Manufacturer:
Bussmann
Quantity:
40 000
Part Number:
EP4SGX360FH29C3N
Manufacturer:
ALTERA21
Quantity:
53
Part Number:
EP4SGX360FH29C3N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP4SGX360FH29C3N
Manufacturer:
ALTERA
0
Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Design Security
April 2011 Altera Corporation
Security Modes Available
At system power-up, the external memory device sends the encrypted configuration
file to the Stratix IV device.
Figure 10–29. Design Security
Note to
(1) Step 1, Step 2, and Step 3 correspond to the procedure described in
The following security modes are available on the Stratix IV device.
Volatile Key
Secure operation with volatile key programmed and required external battery: this
mode accepts both encrypted and unencrypted configuration bitstreams. Use the
unencrypted configuration bitstream support for board-level testing only.
Non-Volatile Key
Secure operation with one time programmable (OTP) security key programmed: this
mode accepts both encrypted and unencrypted configuration bitstreams. Use the
unencrypted configuration bitstream support for board level testing only.
Non-Volatile Key with Tamper Protection Bit Set
Secure operation in tamper resistant mode with OTP security key programmed: only
encrypted configuration bitstreams are allowed to configure the device. Tamper
protection disables JTAG configuration with unencrypted configuration bitstream.
Figure
10–29:
User-Defined
Configuration
Encrypted
AES Key
File
(Note 1)
Step 2
Step 1
“Design Security” on page
Configuration
Stratix IV Device
Memory or
Key Storage
Decryption
Stratix IV Device Handbook Volume 1
Device
AES
Step 3
10–63.
10–67

Related parts for EP4SGX360FH29C3N