HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 106

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 6 Interrupt Controller (INTC)
6.3.2
The ICR is a 16-bit register that sets the input signal detection mode of the external interrupt input
pin NMI and IRQ0 –IRQ7 and indicates the input signal level to the NMI pin. A power-on reset
and hardware standby mode initialize ICR but the software standby mode does not.
Note:
Bit 15—NMI Input Level (NMIL): Sets the level of the signal input at the NMI pin. This bit can
be read to determine the NMI pin level. This bit cannot be modified.
Bit 15: NMIL
0
1
Bits 14 to 9—Reserved: These bits always read as 0. The write value should always be 0.
Bit 8—NMI Edge Select (NMIE)
Bit 8: NMIE
0
1
Rev. 5.00 Jan 06, 2006 page 86 of 818
REJ09B0273-0500
Initial value:
Initial value:
* When NMI input is high: 1; when NMI input is low: 0
Interrupt Control Register (ICR)
R/W:
R/W:
Bit:
Bit:
IRQ0S
NMIL
R/W
15
R
*
7
0
Description
NMI input level is low
NMI input level is high
Description
Interrupt request is detected on falling edge of NMI input (initial value)
Interrupt request is detected on rising edge of NMI input
IRQ1S
R/W
14
R
0
6
0
IRQ2S
R/W
13
R
0
5
0
IRQ3S
R/W
12
R
0
4
0
IRQ4S
R/W
11
R
0
3
0
IRQ5S
R/W
10
R
0
2
0
IRQ6S
R/W
R
9
0
1
0
IRQ7S
NMIE
R/W
R/W
8
0
0
0

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