HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 24

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 1 Overview
Item
Bus state
controller (BSC)
Direct memory
access controller
(DMAC)
(4 channels)
Rev. 5.00 Jan 06, 2006 page 4 of 818
REJ09B0273-0500
Features
Supports external memory access (SRAM and ROM directly connectable)
External address space divided into four areas, with the following
parameters settable for each area:
Wait cycles can be inserted using an external WAIT signal
External access in minimum of two cycles
Provision for idle cycle insertion to prevent bus collisions
(between external space read and write cycles, etc.)
DMA transfer possible for the following devices:
DMA transfer requests by external pins, on-chip SCI, on-chip A/D
converter, on-chip ATU
Cycle stealing or burst transfer
Relative channel priorities can be set
Channels 0 and 1: Selection of dual or single address mode transfer,
external requests possible
Channels 2 and 3: Dual address mode transfer and internal requests only
Source address reload function (channel 2 only)
Can be switched between direct address transfer mode and indirect
address transfer mode (channel 3 only)
8/16-bit external data bus
Bus size (8 or 16 bits)
Number of wait cycles
Chip select signals (CS0 to CS3) output for each area
External memory, external I/O, external memory, on-chip supporting
modules (excluding DMAC, UBC, BSC)
Direct address transfer mode: Transfers the data at the transfer source
address to the transfer destination address
Indirect address transfer mode: Regards the data at the transfer source
address as an address, and transfers the data at that address to the
transfer destination address