HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 379

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit 5—Timer Enable (TME): Enables or disables the timer.
Bits 4 and 3—Reserved: These bits always read as 1. The write value should always be 1.
Bits 2 to 0: Clock Select 2 to 0 (CKS2 to CKS0): These bits select one of eight internal clock
sources for input to the TCNT. The clock signals are obtained by dividing the frequency of the
system clock ( ).
Note:
Bit 5: TME
0
1
Bit 2: CKS2 Bit 1: CKS1
0
0
0
0
1
1
1
1
* The overflow interval listed is the time from when the TCNT begins counting at H'00
until an overflow occurs.
0
0
1
1
0
0
1
1
Description
Timer disabled: TCNT is initialized to H'00 and count-up stops (initial
value)
Timer enabled: TCNT starts counting. A WDTOVF signal or interrupt is
generated when TCNT overflows.
Bit 0: CKS0
0
1
0
1
0
1
0
1
Clock Source
/2 (initial value)
/64
/128
/256
/512
/1024
/4096
/8192
Rev. 5.00 Jan 06, 2006 page 359 of 818
Section 12 Watchdog Timer (WDT)
Description
Overflow Interval *
( = 20 MHz)
25.6 µs
819.2 µs
1.6 ms
3.3 ms
6.6 ms
13.1 ms
52.4 ms
104.9 ms
REJ09B0273-0500