HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 396

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Serial Communication Interface (SCI)
Bit 4—Parity Mode (O/E E E E ): Selects even or odd parity when parity bits are added and checked.
The O/E setting is used only in asynchronous mode and only when the parity enable bit (PE) is set
to 1 to enable parity addition and check. The O/E setting is ignored in the clock synchronous
mode, or in the asynchronous mode when parity addition and check is disabled.
Bit 4: O/E E E E
0
1
Bit 3—Stop Bit Length (STOP): Selects one or two bits as the stop bit length in the
asynchronous mode. This setting is used only in the asynchronous mode. It is ignored in the clock
synchronous mode because no stop bits are added.
In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1, it is treated as a stop bit, but if the second stop bit is 0, it is treated as the start bit of
the next incoming character.
Bit 3: STOP
0
1
Bit 2—Multiprocessor Mode (MP): Selects multiprocessor format. When multiprocessor format
is selected, settings of the parity enable (PE) and parity mode (O/E) bits are ignored. The MP bit
setting is used only in the asynchronous mode; it is ignored in the clock synchronous mode. For
the multiprocessor communication function, see section 13.3.3, Multiprocessor Communication.
Bit 2: MP
0
1
Rev. 5.00 Jan 06, 2006 page 376 of 818
REJ09B0273-0500
Description
Even parity (initial value). If even parity is selected, the parity bit is
added to transmit data to make an even number of 1s in the transmitted
character and parity bit combined. Receive data is checked to see if it
has an even number of 1s in the received character and parity bit
combined.
Odd parity. If odd parity is selected, the parity bit is added to transmit
data to make an odd number of 1s in the transmitted character and
parity bit combined. Receive data is checked to see if it has an odd
number of 1s in the received character and parity bit combined.
Description
One stop bit (initial value). In transmitting, a single bit of 1 is added at
the end of each transmitted character.
Two stop bits. In transmitting, two bits of 1 are added at the end of each
transmitted character.
Description
Multiprocessor function disabled (initial value)
Multiprocessor format selected