HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 825

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Notes: 1. Only 0 can be written in the TE bit, after reading 1 from this bit.
DMA Channel Control Registers 0 to 3
(CHCR0 to CHCR3)
Bit
20
19
18
17
16
15, 14
Initial value:
Initial value:
Bit name:
Bit name: DM1 DM0 SM1 SM0 RS3 RS2 RS1 RS0
R/W:
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
2. The DI, RO, RL, AM, AL, or DS bit may be absent, depending on the channel.
Bit Name
Direct/indirect select
(DI)
Source address reload
(RO)
Request check level
(RL)
Acknowledge mode
(AM)
Acknowledge level
(AL)
Destination address
mode 1 and 0
(DM1, DM0)
Bit:
Bit:
31
15
—
R
0
0
30
14
—
R
0
0
29
13
—
R
0
0
Value
0
1
0
1
0
1
0
1
0
1
0
1
28
12
—
R
0
0
0
1
0
1
27
11
—
R
0
0
26
10
—
R
0
0
Description
Channel 3 operates in direct address mode
Channel 3 operates in indirect address mode
Source address not reloaded
Source address reloaded
Active-high DRAK output
Active-low DRAK output
DACK output in read cycle
DACK output in write cycle
Active-high output
Active-low output
Destination address fixed
Destination address incremented (+1 for 8-bit transfer, +2 for 16-bit
transfer, +4 for 32-bit transfer)
Destination address decremented (–1 for 8-bit transfer, –2 for 16-bit
transfer, –4 for 32-bit transfer)
Setting prohibited
25
—
R
0
9
0
Appendix A On-Chip Supporting Module Registers
H'FFFF86CC (Channel 0) 16/32
H'FFFF86DC (Channel 1) 16/32
H'FFFF86EC (Channel 2) 16/32
H'FFFF86FC (Channel 3) 16/32
24
—
R
0
8
0
23
Rev. 5.00 Jan 06, 2006 page 805 of 818
—
—
R
R
0
7
0
R/W R/W R/W R/W R/W R/(W) R/W
DS
22
—
R
0
6
0
TM TS1 TS0
21
—
R
0
5
0
R/W R/W R/W R/W R/W
20
DI
0
4
0
RO
19
0
3
0
REJ09B0273-0500
RL
18
IE
0
2
0
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)
AM
TE
17
0
1
0
DMAC
DE
AL
16
0
0
0