HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 580

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 18 ROM (128 kB Version)
Rev. 5.00 Jan 06, 2006 page 560 of 818
REJ09B0273-0500
Notes: 1. Preprogramming (setting erase block data to all “0”) is not necessary.
2. Verify data is read in 32-bit (longword) units.
3. Set only one bit in EBR1. More than one bit cannot be set.
4. Erasing is performed in block units. To erase a number of blocks, each block must be erased in turn.
increment
Address
NG
NG
Figure 18.8 Erase/Erase-Verify Flowchart
Set top block address to verify address
Dummy write H'FF to verify address
*4
Clear ESU-bit of FLMCR1
Clear SWE-bit in FLMCR1
Set SWE bit in FLMCR1
Set ESU-bit of FLMCR1
Clear EV-bit of FLMCR1
Clear E-bit of FLMCR1
Set EV-bit of FLMCR1
Set E-bit of FLMCR1
Verify data = all "1"?
Last block address?
Erase complete
Read verify data
objective blocks
WDT Disable
WDT Enable
Wait 200 s
Wait 10 s
Wait 10 s
Wait 10 s
Wait 20 s
Set EBR1
Wait 5ms
Wait 2 s
Wait 5 s
erased?
n = 1
Start
All
OK
OK
OK
*1
NG
*3
Erase start
Erase stop
*2
Clear SWE-bit of FLMCR1
Clear EV-bit of FLMCR1
Erase error
Wait 5 s
n
61?
OK
NG
n
n + 1