HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 117

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

7.1.3
The UBC has the five registers shown in table 7.1. Break conditions are established using these
registers.
Table 7.1
Note:
7.2
7.2.1
UBARH:
Name
User break address register H
User break address register L
User break address mask register H
User break address mask register L
User break bus cycle register
Initial value:
Initial value:
* In register access, three cycles are required for byte access and word access, and six
Register Configuration
Register Descriptions
User Break Address Register (UBAR)
UBARH
UBARH
cycles for longword access.
Register Configuration
R/W:
R/W:
Bit:
Bit:
UBA31
UBA23
R/W
R/W
15
0
7
0
UBA30
UBA22
R/W
R/W
14
0
6
0
Abbr.
UBARH
UBARL
UBAMRH
UBAMRL
UBBR
UBA29
UBA21
R/W
R/W
13
0
5
0
UBA28
UBA20
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
12
0
4
0
Rev. 5.00 Jan 06, 2006 page 97 of 818
Section 7 User Break Controller (UBC)
Initial
Value
H'0000
H'0000
H'0000
H'0000
H'0000
UBA27
UBA19
R/W
R/W
11
0
3
0
Address *
H'FFFF8600
H'FFFF8602
H'FFFF8604
H'FFFF8606
H'FFFF8608
UBA26
UBA18
R/W
R/W
10
0
2
0
REJ09B0273-0500
UBA25
UBA17
R/W
R/W
9
0
1
0
Access
Size
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
UBA24
UBA16
R/W
R/W
8
0
0
0