HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 176

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 9 Direct Memory Access Controller (DMAC)
Rev. 5.00 Jan 06, 2006 page 156 of 818
REJ09B0273-0500
Transfer on channel 0
Transfer on channel 1
Transfer on channel 2
Transfer on channel 3
Initial priority setting
Initial priority setting
Initial priority setting
Initial priority setting
Priority after transfer
Priority after transfer
Priority after transfer
Priority after transfer
due to issue of a transfer
request for channel 1
only.
Priority after transfer
CH0
CH0
CH0
CH0
CH0
Figure 9.3 Round Robin Mode
CH3
CH2
CH1
CH2
CH1
CH1
CH1
CH1
CH1
CH0
CH3
CH2
CH3
CH2
CH2
CH2
CH2
CH2
CH1
CH0
CH3
CH0
CH3
CH3
CH3
CH3
CH3
CH2
CH1
CH0
CH1
Channel 1 is given the lowest
priority.
When channel 1 is given the
lowest priority, the priority
of channel 0, which was
above channel 1, is also shifted
simultaneously.
When channel 2 receives the
lowest priority, the priorities
of channel 0 and 1, which
were above channel 2, are also
shifted simultaneously. Immedi-
ately thereafter, if there is a transfer
request for channel 1 only, channel
1 is given the lowest priority,
and the priorities of channels 3
and 0 are simultaneously
shifted down.
No change in priority.

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