HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 186

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 Direct Memory Access Controller (DMAC)
Figure 9.11 shows an example of timing in indirect address mode when transfer source and
indirect address storage locations are in internal memory, the transfer destination is an on-chip
peripheral module with 2-cycle access space, and transfer data is 8-bit.
Since the indirect address storage destination and the transfer source are in internal memory, these
can be accessed in one cycle. The transfer destination is 2-cycle access space, so two data write
cycles are required. One NOP cycle is required until the data read as the indirect address is output
to the address bus.
Rev. 5.00 Jan 06, 2006 page 166 of 818
REJ09B0273-0500
Internal memory space
address
address
indirect
Internal
Internal
DMAC
DMAC
buffer
buffer
Figure 9.11 Dual Address Mode and Indirect Address Transfer Timing Example 2
data
data
bus
bus
CK
Transfer
address
source
read cycle
Address
Indirect
address
Internal memory space
(1st)
NOP
Indirect
address
address
Indirect
(2nd)
cycle
NOP
NOP
read cycle
destination
Transfer
address
Transfer
(3rd)
Data
data
Data write cycle (4th)
Transfer data
Transfer data