HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 536
HD64F7050
Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD64F7050.pdf
(841 pages)
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Section 16 Pin Function Controller (PFC)
16.3.15 CK Control Register (CKCR)
CK control register (CKCR) is a 16-bit readable/writable register being used for controlling clock
output from CK terminal.
CKCR is initialized to H'FFFE by a power-on reset and in hardware standby mode. It is not
initialized in software standby mode or sleep mode.
Bits 15 to 1—Reserved: This bit is always read as 1, and should only be written with 1.
Bit 0—CK low fixed bit (CKLO): This bit is used for selecting the internal clock output or low
level output for output from the CK terminal.
Bit 0:
CKLO
0
1
Rev. 5.00 Jan 06, 2006 page 516 of 818
REJ09B0273-0500
Initial value:
R/W:
Bit:
Description
Selects the internal clock for the CK terminal output
Always selects the low level for the CK terminal output
15
—
R
1
14
—
R
1
13
—
R
1
12
—
R
1
11
—
R
1
10
—
R
1
—
R
9
1
—
R
8
1
—
R
7
1
—
R
6
1
—
R
5
1
—
R
4
1
—
R
3
1
—
R
2
1
(Initial value)
—
R
1
1
CKLO
R/W
0
0
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