HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 385

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

12.3.4
In the interval timer mode, when the TCNT overflows, the OVF flag of the TCSR is set to 1 and
an interval timer interrupt is simultaneously requested (figure 12.6).
12.3.5
When the TCNT overflows in the watchdog timer mode, the WOVF bit of the RSTCSR is set to 1
and a WDTOVF signal is output. When the RSTE bit is set to 1, TCNT overflow enables an
internal reset signal to be generated for the entire chip (figure 12.7).
Overflow signal
(internal signal)
Overflow signal
(internal signal)
Timing of Setting the Overflow Flag (OVF)
Timing of Setting the Watchdog Timer Overflow Flag (WOVF)
WOVF
TCNT
CK
TCNT
OVF
CK
Figure 12.7 Timing of Setting the WOVF Bit
Figure 12.6 Timing of Setting the OVF
H'FF
H'FF
H'00
H'00
Rev. 5.00 Jan 06, 2006 page 365 of 818
Section 12 Watchdog Timer (WDT)
REJ09B0273-0500