HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 275

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Bit 5—Input Capture/Compare-Match Interrupt Enable (IME1F): Enables or disables
interrupt requests by IMF1F in TSR when IMF1F is set to 1.
Bit 4—Input Capture/Compare-Match Interrupt Enable (IME1E): Enables or disables
interrupt requests by IMF1E in TSR when IMF1E is set to 1.
Bit 3—Input Capture/Compare-Match Interrupt Enable (IME1D): Enables or disables
interrupt requests by IMF1D in TSR when IMF1D is set to 1.
Bit 2—Input Capture/Compare-Match Interrupt Enable (IME1C): Enables or disables
interrupt requests by IMF1C in TSR when IMF1C is set to 1.
Bit 5:
IME1F
0
1
Bit 4:
IME1E
0
1
Bit 3:
IME1D
0
1
Bit 2:
IME1C
0
1
Description
IMI1F interrupt requested by IMF1F is disabled
IMI1F interrupt requested by IMF1F is enabled
Description
IMI1E interrupt requested by IMF1E is disabled
IMI1E interrupt requested by IMF1E is enabled
Description
IMI1D interrupt requested by IMF1D is disabled
IMI1D interrupt requested by IMF1D is enabled
Description
IMI1C interrupt requested by IMF1C is disabled
IMI1C interrupt requested by IMF1C is enabled
Rev. 5.00 Jan 06, 2006 page 255 of 818
Section 10 Advanced Timer Unit (ATU)
REJ09B0273-0500
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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