HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 338

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 Advanced Timer Unit (ATU)
Sample Setup Procedure for Waveform Output by Output Compare-Match: An example of
the setup procedure for waveform output by output compare-match is shown in figure 10.46.
1. Set the first-stage counter clock ' in prescaler register 1 (PSCR1), and select the second-stage
2. Set the port E control register (PECR) or port G control register (PGCR), corresponding to the
3. Select 0, 1, or toggle output for output compare-match output with the timer I/O control
4. Set the timing for compare-match generation in the ATU general register (GR) corresponding
5. Set the corresponding bit to 1 in the timer start register (TSTR) to start the free-running
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counter clock " with the CKSEL bit in the timer control register (TCR). When selecting an
external clock, also select the external clock edge type with the CKEG bit in TCR.
waveform output port, to ATU output compare-match output. Also set the corresponding bit to
1 in the port E IO register (PEIOR) or port G IO register (PGIOR) to specify the output
attribute for the port.
register (TIOR). If necessary, an interrupt request can be sent to the CPU on output compare-
match by making the appropriate setting in the interrupt enable register (TIER).
to the port set in 2.
counter (TCNT). Waveform output is performed from the relevant port when the TCNT value
and GR value match.