HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 307
HD64F7050
Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD64F7050.pdf
(841 pages)
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External output value selection and counter clear function (channels 3 to 5 only) specification can
be performed with the timer I/O control register (TIOR). 1 output, 0 output, or toggle output can
be selected as the external output value. When the counter clear function is specified, the relevant
TCNT is cleared to H'0000 by a compare-match between the corresponding general register and
TCNT. If the appropriate interrupt enable register (TIER) setting is made, an interrupt request will
be sent to the CPU when an output compare-match occurs.
An example of free-running counter and output compare-match operation is shown in figure
10.13.
In the example in figure 10.13, ATU channel 1 is activated, and external output is performed with
1 output specified in the event of GR1A output compare-match, 0 output in the event of GR1B
output compare-match, and toggle output in the event of GR1C output compare-match.
(toggle output)
(1 output)
(0 output)
H'FFFF
H'0000
TIOC1
TIOA1
TIOB1
GR1C
GR1A
GR1B
Figure 10.13 Example of Output Compare-Match Operation
Counter value
TCNT1
No change
Rev. 5.00 Jan 06, 2006 page 287 of 818
Section 10 Advanced Timer Unit (ATU)
No change
REJ09B0273-0500
No change
Time
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