HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 188

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 9 Direct Memory Access Controller (DMAC)
9.3.8
Table 9.6 shows the relationship between request modes and bus modes by DMA transfer
category.
Table 9.6
Address
Mode
Single
Dual
Notes: 1. External request, auto-request or on-chip peripheral module request enabled. However,
Rev. 5.00 Jan 06, 2006 page 168 of 818
REJ09B0273-0500
2. External request, auto-request or on-chip peripheral module request possible. However,
3. When the transfer request source is the SCI, only cycle steal mode is possible.
4. Access size permitted by register of on-chip peripheral module that is the transfer
5. When the transfer request is an external request, channels 0 and 1 only can be used.
6. B: Burst, C: Cycle steal
Relationship between Request Modes and Bus Modes by DMA Transfer Category
Transfer Category
External device with DACK and
external memory
External device with DACK and
memory-mapped external device
External memory and external memory
External memory and memory-mapped
external device
Memory-mapped external device and
memory-mapped external device
External memory and on-chip memory
External memory and on-chip
peripheral module
Memory-mapped external device and
on-chip memory
Memory-mapped external device and
on-chip peripheral module
On-chip memory and on-chip memory
On-chip memory and on-chip
peripheral module
On-chip peripheral module and on-
chip peripheral module
in the case of on-chip peripheral module request, it is not possible to specify the SCI or
A/D converter for the transfer request source.
if transfer request source is also the SCI or A/D converter, the transfer source or
transfer destination must be the SCI or A/D converter.
source or transfer destination.
Relationship of Request Modes and Bus Modes by DMA Transfer Category
Request
Mode
External
External
Any *
Any *
Any *
Any *
Any *
Any *
Any *
Any *
Any *
Any *
1
1
1
1
2
1
2
1
2
2
Bus *
Mode
B/C
B/C
B/C
B/C
B/C
B/C
B/C *
B/C
B/C *
B/C
B/C *
B/C *
3
3
3
3
6
Transfer
Size (Bits)
8/16/32
8/16/32
8/16/32
8/16/32
8/16/32
8/16/32
8/16/32 *
8/16/32
8/16/32 *
8/16/32
8/16/32 *
8/16/32 *
4
4
4
4
Usable
Channels
0,1
0, 1
0–3 *
0–3 *
0–3 *
0–3 *
0–3 *
0–3 *
0–3 *
0–3 *
0–3 *
0–3 *
5
5
5
5
5
5
5
5
5
5

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