HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 282

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 Advanced Timer Unit (ATU)
Bit 2—Cycle Register Compare-Match Interrupt Enable (CME8): Enables or disables
interrupt requests by CMF8 in TSR when CMF8 is set to 1.
Bit 2:
CME8
0
1
Bit 1—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 0—Cycle Register Compare-Match Interrupt Enable (CME9): Enables or disables
interrupt requests by CMF9 in TSR when CMF9 is set to 1.
Bit 0:
CME9
0
1
Timer Interrupt Enable Register F (TIERF)
TIERF controls enabling/disabling of channel 10 one-shot pulse interrupt requests.
Bit 7—One-Shot Pulse Interrupt Enable (OSE10H): Enables or disables interrupt requests by
OSF10H in TSR when OSF10H is set to 1.
Bit 7:
OSE10H
0
1
Rev. 5.00 Jan 06, 2006 page 262 of 818
REJ09B0273-0500
Initial value:
Description
CMI8 interrupt requested by CMF8 is disabled
CMI8 interrupt requested by CMF8 is enabled
Description
CMI9 interrupt requested by CMF9 is disabled
CMI9 interrupt requested by CMF9 is enabled
Description
OSI10H interrupt requested by OSF10H is disabled
OSI10H interrupt requested by OSF10H is enabled
R/W:
Bit:
OSE10H OSE10G OSE10F OSE10E OSE10D OSE10C OSE10B OSE10A
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
R/W
0
0