HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 416

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Serial Communication Interface (SCI)
13.3.2
In the asynchronous mode, each transmitted or received character begins with a start bit and ends
with a stop bit. Serial communication is synchronized one character at a time.
The transmitting and receiving sections of the SCI are independent, so full duplex communication
is possible. The transmitter and receiver are both double buffered, so data can be written and read
while transmitting and receiving are in progress, enabling continuous transmitting and receiving.
Figure 13.2 shows the general format of asynchronous serial communication. In asynchronous
serial communication, the communication line is normally held in the marking (high) state. The
SCI monitors the line and starts serial communication when the line goes to the space (low) state,
indicating a start bit. One serial character consists of a start bit (low), data (LSB first), parity bit
(high or low), and stop bit (high), in that order.
When receiving in the asynchronous mode, the SCI synchronizes on the falling edge of the start
bit. The SCI samples each data bit on the eighth pulse of a clock with a frequency 16 times the bit
rate. Receive data is latched at the center of each bit.
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REJ09B0273-0500
Figure 13.2 Data Format in Asynchronous Communication (Example: 8-bit Data with
Serial
data
Operation in Asynchronous Mode
1
1 bit
Start
bit
0
(LSB)
One unit of communication data (characters or frames)
D0
D1
Transmit/receive data
D2
Parity and Two Stop Bits)
7 or 8 bits
D3
D4
D5
D6
(MSB)
D7
Idling (marking state)
Parity
no bit
1 or
0/1
bit
1
Stop
2 bits
1 or
bit
1
1