HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 221

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Block Diagram of Channel 0: Figure 10.2 shows a block diagram of ATU channel 0.
TSTR
1
Legend:
TSTR:
TIOR0A: Timer I/O control register 0A (8 bits)
TGSR:
TSRA:
TIERA:
ITVRR:
TCNT0: Free-running counter 0 (16 bits)
ICR0:
Interrupts:
OVI0:
ITV:
ICI0:
Inter-channel connection signal:
TRG1A: Channel 1/GR1A compare-match signal
/m
m
32
Timer start register (16 bits)
Trigger selection register (8 bits)
Timer status register A (8 bits)
Timer interrupt enable register A (8 bits)
Interval interrupt request register (8 bits)
Input capture register 0 (16 bits)
Overflow interrupt 0
Interval interrupt
Input capture interrupt 0
selection
Clock
Figure 10.2 Block Diagram of Channel 0
Control logic
Module data bus
TGSR control
Rev. 5.00 Jan 06, 2006 page 201 of 818
Section 10 Advanced Timer Unit (ATU)
IRQER control
REJ09B0273-0500
OVI0
ITV
ICI0A
ICI0B
ICI0C
ICI0D
TIA0
TIB0
TIC0
TID0
TRG1A