HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 442

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Serial Communication Interface (SCI)
Error handling
Overrun error processing
Clear ORER bit of SSR to 0
End
Figure 13.20 Sample Flowchart for Serial Receiving (cont)
Figure 13.21 shows an example of the SCI receive operation.
Transfer direction
Synchroni-
zation clock
Serial
Bit 7
Bit 0
Bit 7
Bit 0
Bit 1
Bit 6
Bit 7
data
RDRF
ORER
Read data with RxI
RxI request
RxI request
interrupt processing
ERI interrupt
routine and clear
request generated
RDRF bit to 0
by overrun error
1 frame
Figure 13.21 Example of SCI Receive Operation
In receiving, the SCI operates as follows:
1. The SCI synchronizes with serial clock input or output and initializes internally.
2. Receive data is shifted into the RSR in order from the LSB to the MSB. After receiving the
data, the SCI checks that RDRF is 0 so that receive data can be loaded from the RSR into the
Rev. 5.00 Jan 06, 2006 page 422 of 818
REJ09B0273-0500