HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 265

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit 0—Input Capture/Compare-Match Flag (IMF3A): Status flag that indicates GR3A input
capture or compare-match.
TSRDL indicates the status of channel 4 and 5 input capture, compare-match, and overflow.
Note:
Bit 7—Overflow Flag (OVF4): Status flag that indicates TCNT4 overflow.
Bit 0:
IMF3A
0
1
Bit 7:
OVF4
0
1
Initial value:
* Only 0 can be written, to clear the flag.
Description
[Clearing condition]
When IMF3A is read while set to 1, then 0 is written in IMF3A
[Setting conditions]
Description
[Clearing condition]
When OVF4 is read while set to 1, then 0 is written in OVF4
[Setting condition]
When the TCNT4 value overflows (from H'FFFF to H'0000)
R/W:
Bit:
When the TCNT3 value is transferred to GR3A by an input capture signal while
GR3A is functioning as an input capture register
When TCNT3 = GR3A while GR3A is functioning as an output compare register
R/(W) *
OVF4
7
0
R/(W) *
IMF4D
6
0
R/(W) *
IMF4C
5
0
R/(W) *
IMF4B
4
0
Rev. 5.00 Jan 06, 2006 page 245 of 818
Section 10 Advanced Timer Unit (ATU)
R/(W) *
IMF4A
3
0
R/(W) *
OVF5
2
0
REJ09B0273-0500
R/(W) *
IMF5B
1
0
(Initial value)
(Initial value)
R/(W) *
IMF5A
0
0