HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 223

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Block Diagram of Channel 2: Figure 10.4 shows a block diagram of ATU channel 2.
Legend:
TSTR:
TCR2:
TIOR2A: Timer I/O control register 2 (8 bits)
TSRC:
TIERC:
TCNT2: Free-running counter 2 (16 bits)
GR2:
Interrupts:
OVI2: Overflow interrupt 2
IMI2: Input capture/compare-match interrupt 2
Inter-channel connection signal:
OFF2: Offset compare-match signal
Inter-module connection signals:
APCHIGH: GR2B compare-match signal
APCLOW: GR2A compare-match signal
TCLKA
TCLKB
1
0
/(m·2
TSTR
m
n
n
)
5
32
Timer start register (16 bits)
Timer control register 2 (8 bits)
Timer status register C (8 bits)
Timer interrupt enable register C (8 bits)
General register 2 (16 bits)
Clock selection
Figure 10.4 Block Diagram of Channel 2
Module data bus
Control logic
Comparator
Rev. 5.00 Jan 06, 2006 page 203 of 818
Section 10 Advanced Timer Unit (ATU)
REJ09B0273-0500
OFF2A–2B
APCHIGH
APCLOW
OVI2
IMI2A
IMI2B
TIOA2
TIOB2