HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 53

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

2.3.3
Table 2.9 lists the instruction formats for the source operand and the destination operand. The
meaning of the operand depends on the instruction code. The symbols are used as follows:
Table 2.9
Instruction Formats
0 format
15
n format
15
m format
15
xxxx
xxxx
xxxx
xxxx: Instruction code
mmmm: Source register
nnnn: Destination register
iiii: Immediate data
dddd: Displacement
mmmm
Instruction Format
xxxx
nnnn
Instruction Formats
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
0
0
0
Source
Operand
—
—
Control register
or system
register
Control register
or system
register
mmmm: Direct
register
mmmm: Indirect
post-increment
register
mmmm: Direct
register
mmmm: PC
relative using
Rm
Destination
Operand
—
nnnn: Direct
register
nnnn: Direct
register
nnnn: Indirect
pre-decrement
register
Control register or
system register
Control register or
system register
—
—
Rev. 5.00 Jan 06, 2006 page 33 of 818
Example
NOP
MOVT
STS
STC.L
LDC
LDC.L
JMP
BRAF
REJ09B0273-0500
Section 2 CPU
Rn
MACH,Rn
@Rm
SR,@-Rn
Rm,SR
@Rm+,SR
Rm