HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 135

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

8.2
8.2.1
BCR1 is a 16-bit read/write register that specifies the bus size of the CS spaces.
Write bits 15–0 of BCR1 during the initialization stage after a power-on reset, and do not change
the values thereafter. In on-chip ROM effective mode, do not access any of the CS spaces until
after completion of register initialization. In on-chip ROM ineffective mode, do not access any CS
space other than CS0 until after completion of register initialization.
BCR1 is initialized to H'000F by a power-on reset and in hardware standby mode. It is not
initialized in software standby mode.
Bits 15–4—Reserved: These bits always read as 0. The write value should always be 0.
Bit 3—CS3 Space Size Specification (A3SZ): Specifies the CS3 space bus size. A 0 setting
specifies byte (8-bit) size, and a 1 setting specifies word (16-bit) size.
Bit 2—CS2 Space Size Specification (A2SZ): Specifies the CS2 space bus size. A 0 setting
specifies byte (8-bit) size, and a 1 setting specifies word (16-bit) size.
Bit 3: A3SZ
0
1
Initial value:
Initial value:
Description of Registers
Bus Control Register 1 (BCR1)
R/W:
R/W:
Bit:
Bit:
15
—
—
R
R
0
7
0
Description
Byte (8 bit) size
Word (16 bit) size (initial value)
14
—
—
R
R
0
6
0
13
—
—
R
R
0
5
0
12
—
—
R
R
4
0
0
Rev. 5.00 Jan 06, 2006 page 115 of 818
Section 8 Bus State Controller (BSC)
A3SZ
R/W
11
—
R
3
1
0
A2SZ
R/W
10
—
R
2
1
0
REJ09B0273-0500
A1SZ
R/W
—
R
1
1
9
0
A0SZ
R/W
—
R
8
0
0
1