HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 322

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 10 Advanced Timer Unit (ATU)
The timing in this case is shown in figure 10.26. In this example, channel 5 is set to PWM mode,
H'00FE is set in GR5A and H'00FF in GR5B, and free-running counter 5 (TCNT5) is started.
When H'0000 (0% duty) is set in GR5A in the interrupt handling routine after a compare-match
with GR5B, a 0% duty waveform cannot be output immediately since the TCNT5 value is already
H'0002, and so 1 continues to be output until the subsequent compare-match with GR5A.
Rev. 5.00 Jan 06, 2006 page 302 of 818
REJ09B0273-0500
Compare-match signal
generated in interrupt
Counter clear signal
Interrupt status flag
GR5A write signal
Figure 10.26 Channel 5 Waveform when Duty Changes from 100% to 0%
TCNT input clock
handling routine
PWM output
TCNT5
GR5A
GR5B
00FA 00FB 00FC 00FD 00FE 00FF 0000 0001 0002
00FF
Time from compare-match
to GR5A rewrite
00FF
PWM output is 1 although
Period during which
duty value is 0
00FE 00FF 0000 0001 0002 0003
0000

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