HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 728

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Appendix A On-Chip Supporting Module Registers
Bit
7
6, 5, 4
3
2, 1, 0
Rev. 5.00 Jan 06, 2006 page 708 of 818
REJ09B0273-0500
Bit Name
Clear counter enable flags
3B, 3D, 4B, 4D, 5B
(CCI3B, CCI3D, CCI4B,
CCI4D, CCI5B)
I/O control 3B2–3B0, 3D2–3D0,
4B2–4B0, 4D2–4D0, 5B2–5B0
(IO3B2–IO3B0, IO3D2–IO3D0,
IO4B2–IO4B0, IO4D2–IO4D0,
IO5B2–IO5B0)
Clear counter enable flags
3A, 3C, 4A, 4C, 5A
(CCI3A, CCI3C, CCI4A,
CCI4C, CCI5A)
I/O control 3A2–3A0, 3C2–3C0,
4A2–4A0, 4C2–4C0, 5A2–5A0
(IO3A2–IO3A0, IO3C2–IO3C0,
IO4A2–IO4A0, IO4C2–IO4C0,
IO5A2–IO5A0)
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
TCNT clearing disabled
TCNT cleared by GR compare match
GR is output
compare
register
GR is input
capture
register
TCNT clearing disabled
TCNT cleared by GR compare match
GR is output
compare
register
GR is input
capture
register
0 output regardless of compare
match
0 output at GR compare match
1 output at GR compare match
Output toggles at GR compare
match
Input capture disabled
Input capture to GR at rising edge
Input capture to GR at falling edge
Input capture to GR at both edges
0 output regardless of compare
match
0 output at GR compare match
1 output at GR compare match
Output toggles at GR compare
match
Input capture disabled
Input capture to GR at rising edge
Input capture to GR at falling edge
Input capture to GR at both edges
(Initial value)
(Initial value)
(Initial value)
(Initial value)