HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 417

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Transmit/Receive Formats: Table 13.10 shows the 12 communication formats that can be
selected in the asynchronous mode. The format is selected by settings in the serial mode register
(SMR).
Table 13.10 Serial Communication Formats (Asynchronous Mode)
—: Don’t care bits.
Note: START: Start bit
Clock: An internal clock generated by the on-chip baud rate generator or an external clock input
from the SCK pin can be selected as the SCI transmit/receive clock. The clock source is selected
by the C/A bit in the serial mode register (SMR) and bits CKE1 and CKE0 in the serial control
register (SCR) (table 13.9).
CHR PE
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SMR Bits
STOP: Stop bit
P: Parity bit
MPB: Multiprocessor bit
MP
0
0
0
0
0
0
0
0
1
1
1
1
STOP
0
1
0
1
0
1
0
1
0
1
0
1
START
START
START
START
START
START
START
START
START
START
START
START
1
Serial Transmit/Receive Format and Frame Length
2
3
4
7-Bit data
7-Bit data
7-Bit data
7-Bit data
7-Bit data
7-Bit data
Section 13 Serial Communication Interface (SCI)
8-Bit data
8-Bit data
8-Bit data
8-Bit data
8-Bit data
8-Bit data
5
6
Rev. 5.00 Jan 06, 2006 page 397 of 818
7
8
STOP
STOP STOP
MPB
MPB
P
P
9
STOP
STOP STOP
STOP
STOP STOP
STOP
STOP STOP
MPB
MPB
10
P
P
REJ09B0273-0500
STOP STOP
STOP STOP
STOP
STOP
11
12

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