HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 405

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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The BRR setting is calculated as follows:
The bit rate error in asynchronous mode is calculated as follows:
Asynchronous mode:
N =
Synchronous mode:
N =
B: Bit rate (bit/s)
N: Baud rate generator BRR setting (0
n: Baud rate generator input clock (n = 0 to 3)
(See the following table for the clock sources and value of n.)
Error (%) =
n
0
1
2
3
: Operating frequency (MHz)
64
8
2
2
2n 1
2n 1
Clock Source
/4
/16
/64
(N
B
B
1)
B
10
10
6
6
10
64
6
1
1
2
2n 1
CKS1
0
0
1
1
Section 13 Serial Communication Interface (SCI)
N
1
255)
100
Rev. 5.00 Jan 06, 2006 page 385 of 818
SMR Settings
CKS2
0
1
0
1
REJ09B0273-0500

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