HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 637

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

19.8.3
In error protection, an error is detected when SH7051 runaway occurs during flash memory
programming/erasing, or operation is not performed in accordance with the program/erase
algorithm, and the program/erase operation is aborted. Aborting the program/erase operation
prevents damage to the flash memory due to overprogramming or overerasing.
If the SH7051 malfunctions during flash memory programming/erasing, the FLER bit is set to 1 in
FLMCR2 and the error protection state is entered. The FLMCR1, FLMCR2, EBR1, and EBR2
settings are retained, but program mode or erase mode is aborted at the point at which the error
occurred. Program mode or erase mode cannot be re-entered by re-setting the P1, P2, E1, or E2
bit. However, PV1, PV2, EV1, and EV2 bit setting is enabled, and a transition can be made to
verify mode.
FLER bit setting conditions are as follows:
1. When flash memory is read during programming/erasing (including a vector read or instruction
2. Immediately after exception handling (excluding a reset) during programming/erasing
3. When a SLEEP instruction (including software standby) is executed during
4. When the bus is released during programming/erasing
Error protection is released only by a reset and in hardware standby mode.
Figure 19.9 shows the flash memory state transition diagram.
fetch)
programming/erasing
Error Protection
Rev. 5.00 Jan 06, 2006 page 617 of 818
Section 19 ROM (256 kB Version)
REJ09B0273-0500