HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 136

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 8 Bus State Controller (BSC)
Bit 2: A2SZ
0
1
Bit 1—CS1 Space Size Specification (A1SZ): Specifies the CS1 space bus size. A 0 setting
specifies byte (8-bit) size, and a 1 setting specifies word (16-bit) size.
Bit 1: A1SZ
0
1
Bit 0—CS0 Space Size Specification (A0SZ): Specifies the CS0 space bus size A 0 setting
specifies byte (8-bit) size, and a 1 setting specifies word (16-bit) size.
Bit 0: A0SZ
0
1
Note: A0SZ is effective only in on-chip ROM effective mode. In on-chip ROM ineffective mode,
8.2.2
BCR2 is a 16-bit read/write register that specifies the number of idle cycles and CS signal assert
extension of each CS space.
BCR2 is initialized by a power-on reset and in hardware standby mode to H'FFFF. It is not
initialized by software standby mode.
Rev. 5.00 Jan 06, 2006 page 116 of 818
REJ09B0273-0500
Initial value:
Initial value:
the CS0 space bus size is specified by the mode pin.
Bus Control Register 2 (BCR2)
R/W:
R/W:
Bit:
Bit:
IW31
CW3
R/W
R/W
15
1
7
1
Description
Byte (8 bit) size
Word (16 bit) size (initial value)
Description
Byte (8 bit) size
Word (16 bit) size (initial value)
Description
Byte (8 bit) size
Word (16 bit) size (initial value)
IW30
CW2
R/W
R/W
14
1
6
1
IW21
CW1
R/W
R/W
13
1
5
1
IW20
CW0
R/W
R/W
12
1
4
1
IW11
SW3
R/W
R/W
11
1
3
1
IW10
SW2
R/W
R/W
10
1
2
1
IW01
SW1
R/W
R/W
9
1
1
1
IW00
SW0
R/W
R/W
8
1
0
1