HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 222

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 Advanced Timer Unit (ATU)
Block Diagram of Channel 1: Figure 10.3 shows a block diagram of ATU channel 1.
Rev. 5.00 Jan 06, 2006 page 202 of 818
REJ09B0273-0500
Legend:
TSTR:
TCR1:
TIOR1: Timer I/O control register 1 (8 bits)
TSRB:
Interrupts:
OVI1:
IMI1:
Inter-channel connection signals:
OFF1:
TRG0A: Channel 0/ICR0A input signal
TRG1A: Channel 1/GR1A compare-match signal
1
0
TCLKA
TCLKB
/(m·2
TSTR
m
n
n
)
5
32
Timer start register (16 bits)
Timer control register 1 (8 bits)
Timer status register B (8 bits)
Overflow interrupt 1
Input capture/compare-match interrupt 1
Offset compare-match signal
Clock selection
Figure 10.3 Block Diagram of Channel 1
Module data bus
Control logic
TIERB: Timer interrupt enable register B (8 bits)
TCNT1: Free-running counter 1 (16 bits)
GR1:
OSBR: Offset base register (16 bits)
General register 1 (16 bits)
Comparator
OFF1A–1F
OVI1
IMIA
IMIB
IMIC
IMID
IMIE
IMIF
TIOA1
TIOB1
TIOC1
TIOD1
TIOE1
TIOF1
TRG0A
TRG1A