HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 242

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 10 Advanced Timer Unit (ATU)
Timer Control Registers 1 to 5 (TCR1 to TCR5)
Bits 7 and 6—Reserved: These bits are always read as 0, and should only be written with 0.
Bits 5 and 4—Clock Edge 1 and 0 (CKEG1, CKEG0): These bits select external clock input
edges when an external clock is used.
Bit 5:
CKEG1
0
1
Bit 3—Reserved: This bit is always read as 0, and should only be written with 0.
Bits 2 to 0—Clock Select 2 to 0 (CKSEL2 to CKSEL0): These bits select whether an internal
clock or external clock is used.
When an internal clock is selected, scaled clock " is selected from ', '/2, '/4, '/8, '/16, and
When an external clock is selected, either TCLKA or TCLKB is selected.
Rev. 5.00 Jan 06, 2006 page 222 of 818
REJ09B0273-0500
'/32.
Initial value:
Bit 4:
CKEG0
0
1
0
1
R/W:
Bit:
R
7
0
Description
Rising edges counted
Falling edges counted
Both rising and falling edges counted
External clock count disabled
R
6
0
CKEG1 CKEG0
R/W
5
0
R/W
4
0
R
3
0
CKSEL2 CKSEL1 CKSEL0
R/W
2
0
R/W
1
0
(Initial value)
R/W
0
0

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