HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 257

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit 1—Interval Interrupt Flag (IIF1): Status flag that indicates the generation of an interval
interrupt.
Bit 0—Interval Interrupt Flag (IIF0): Status flag that indicates the generation of an interval
interrupt.
TSRAL indicates the status of channel 0 input capture and overflow.
Note:
Bits 7 to 5—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 4—Overflow Flag (OVF0): Status flag that indicates TCNT0 overflow.
Bit 1:
IIF1
0
1
Bit 0:
IIF0
0
1
Initial value:
* Only 0 can be written, to clear the flag.
Description
[Clearing condition]
When IIF1 is read while set to 1, then 0 is written in IIF1
[Setting condition]
When 1 is generated by AND of ITVE1 in ITVRR and bit 11 of TCNT0L
Description
[Clearing condition]
When IIF0 is read while set to 1, then 0 is written in IIF0
[Setting condition]
When 1 is generated by AND of ITVE0 in ITVRR and bit 10 of TCNT0L
R/W:
Bit:
—
R
7
0
—
R
6
0
—
R
5
0
R/(W) *
OVF0
4
0
Rev. 5.00 Jan 06, 2006 page 237 of 818
Section 10 Advanced Timer Unit (ATU)
R/(W) *
ICF0D
3
0
R/(W) *
ICF0C
2
0
REJ09B0273-0500
R/(W) *
ICF0B
1
0
(Initial value)
(Initial value)
R/(W) *
ICF0A
0
0