HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 670

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HD64F7050

Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 21 Power-Down State
21.4.3
Software Standby Mode Application Example
This example describes a transition to standby mode on the falling edge of an NMI signal, and a
cancellation on the rising edge of the NMI signal. The timing is shown in figure 21.2.
When the NMI pin is changed from high to low level while the NMI edge select bit (NMIE) of the
ICR is set to 0 (falling edge detection), the NMI interrupt is accepted. When the NMIE bit is set to
1 (rising edge detection) by an NMI exception service routine, the standby bit (SBY) of the
SBYCR is set to 1, and a SLEEP instruction is executed, standby mode is entered. Thereafter,
standby mode is canceled when the NMI pin is changed from low to high level.
Oscillator
CK
NMI pin
NMIE bit
SSBY bit
NMI
Program
Exception
Software
Oscillation
WDT
NMI exception
Chip state
exception
execution
service routine
standby mode
start time
set time
handling
handling
Oscillation settling time
Figure 21.2 Standby Mode NMI Timing (Application Example)
Rev. 5.00 Jan 06, 2006 page 650 of 818
REJ09B0273-0500

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