LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 116

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.10
116
Address 0x0007 (PRR)
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
DDRC
DDRD
Field
Field
Reset
7-0
7-0
W
R
Port C Data Direction—
This register controls the data direction of pins 7 through 0.
The external bus function controls the data direction for the associated pins. In this case the data direction bits will
not change.
When operating a pin as a general purpose I/O, the associated data direction bit determines whether it is an input
or output.
1 Associated pin is configured as output.
0 Associated pin is configured as high-impedance input.
Port D Data Direction—
This register controls the data direction of pins 7 through 0.
When used with the external bus this function controls the data direction for the associated pins. In this case the data
direction bits will not change.
When operating a pin as a general purpose I/O, the associated data direction bit determines whether it is an input
or output.
1 Associated pin is configured as output.
0 Associated pin is configured as high-impedance input.
DDRD7
Port D Data Direction Register (DDRD)
0
7
DDRD6
0
6
Figure 2-8. Port D Data Direction Register (DDRD)
Table 2-10. DDRC Register Field Descriptions
Table 2-11. DDRD Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
DDRD5
0
5
DDRD4
0
4
Description
Description
DDRD3
3
0
DDRD2
0
2
Access: User read/write
Freescale Semiconductor
DDRD1
0
1
DDRD0
0
0
(1)