LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 509

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
Address
0x000C
0x000D
0x001C
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000A
0x000B
0x000E ATDCMPHTH
0x000F ATDCMPHTL
0x0010
0x0012
0x0014
0x0016
0x0018
0x001A
0x001E
0x0020
0x0022
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
ATDCMPEH
ATDSTAT2H
ATDCMPEL
ATDSTAT2L
ATDDIENH
ATDSTAT0
ATDDIENL
ATDCTL3
ATDCTL4
ATDCTL5
Unimple-
ATDDR0
ATDDR1
ATDDR2
ATDDR3
ATDDR4
ATDDR5
ATDDR6
ATDDR7
ATDDR8
ATDDR9
mented
Name
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Figure 13-2. ADC12B16C Register Summary (Sheet 2 of 3)
SMP2
Bit 7
DJM
SCF
0
0
MC9S12XE-Family Reference Manual Rev. 1.23
= Unimplemented or Reserved
SMP1
S8C
SC
and
and
and
and
and
and
and
and
and
and
6
0
0
See
See
See
See
See
See
See
See
See
See
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 13.3.2.12.1, “Left Justified Result Data (DJM=0)”
ETORF
SCAN
SMP0
S4C
5
0
FIFOR
MULT
S2C
4
0
CMPHT[15:8]
CMPE[15:8]
CMPHT[7:0]
CMPE[7:0]
CCF[15:8]
IEN[15:8]
CCF[7:0]
Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)
IEN[7:0]
CC3
S1C
CD
3
0
PRS[4:0]
FIFO
CC2
CC
2
0
FRZ1
CC1
CB
1
0
FRZ0
Bit 0
CC0
CA
0
509