LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1228

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Appendix A Electrical Characteristics
A.3.1.9
Erasing a 256K NVM block takes
Erasing a 128K NVM block takes
A.3.1.10
The typical time to erase a1024-byte P-Flash sector can be calculated using
The maximum time to erase a1024-byte P-Flash sector can be calculated using
A.3.1.11
The maximum time for unsecuring the flash is given by
A.3.1.12
The maximum verify backdoor access key time is given by
A.3.1.13
The maximum set user margin level time is given by
A.3.1.14
The maximum set field margin level time is given by
1228
t
t
t
t
t uns
t
t
mass
mass 100100
era
era
=
=
400
350
=
=
=
⎛
⎝
⎛
⎝
≈
≈
⎛
⎝
⋅
⋅
20020
20020
100100
---------------------------- -
f NVMBUS
---------------------------- -
f
100100
NVMBUS
Erase P-Flash Block (FCMD=0x09)
Erase P-Flash Sector (FCMD=0x0A)
Unsecure Flash (FCMD=0x0B)
Verify Backdoor Access Key (FCMD=0x0C)
Set User Margin Level (FCMD=0x0D)
Set Field Margin Level (FCMD=0x0E)
1
1
⋅
⋅
------------------ -
f
------------------ -
f
⋅
NVMOP
NVMOP
⋅
⋅
------------------------ -
f NVMOP
------------------------ -
f NVMOP
------------------------ -
f NVMOP
1
1
1
1
1
⎞
⎠
⎞
⎠
+
+
MC9S12XE-Family Reference Manual , Rev. 1.23
⎛
⎝
⎛
⎝
+
700
1100
+
+
70000
70000
35000
⋅
--------------------- -
f
⋅
NVMBUS
--------------------- -
f
NVMBUS
⋅
1
⋅
⋅
---------------------------- -
f NVMBUS
---------------------------- -
f NVMBUS
---------------------------- -
f NVMBUS
1
⎞
⎠
1
1
1
⎞
⎠
⎞
⎠
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