LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 890

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 24 128 KByte Flash Module (S12XFTM128K2V1)
24.4.4
The Flash module is not affected if the MCU enters wait mode. The Flash module can recover the MCU
from wait via the CCIF interrupt (see
24.4.5
If a Flash command is active (CCIF = 0) or an EE-Emulation operation is pending when the MCU requests
stop mode, the current Flash operation will be completed before the CPU is allowed to enter stop mode.
24.5
The Flash module provides security information to the MCU. The Flash security state is defined by the
SEC bits of the FSEC register (see
register using data read from the security byte of the Flash configuration field at global address
0x7F_FF0F.
890
Security
Wait Mode
Stop Mode
EPVIOLIE
PGMERIE
EPVIOLIF
PGMERIF
ERSERIE
ERSERIF
ERSVIE1
ERSVIF1
ERSVIE0
ERSVIF0
DFDIE
DFDIF
SFDIE
SFDIF
CCIE
CCIF
Figure 24-27. Flash Module Interrupts Implementation
MC9S12XE-Family Reference Manual , Rev. 1.23
Table
Section 24.4.3,
24-12). During reset, the Flash module initializes the FSEC
“Interrupts”).
Flash Command Interrupt Request
Flash Error Interrupt Request
Freescale Semiconductor

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