LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1236

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Appendix A Electrical Characteristics

The voltage regulator is intended to supply the internal logic and oscillator. It allows no external DC loads.

The capacitive loads are speciﬁed in

LVI (low voltage interrupt), POR (power-on reset) and LVRs (low voltage reset) handle chip power-up or

drops of the supply voltage. Their function is shown in

VDD/VDDF external capacitive load

VDDPLL external capacitive load

Resistive Loads

Capacitive Loads

Chip Power-up and Voltage Drops

Figure A-3. MC9S12XE-Family - Chip Power-up and Voltage Drops (not scaled)

Characteristic

MC9S12XE-Family Reference Manual , Rev. 1.23

Table A-22. - Required Capacitive Loads

A-22. Ceramic capacitors with X7R dielectricum are required.

LVI enabled LVI disabled due to LVR

Freescale Semiconductor