LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 392

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 10 XGATE (S12XGATEV3)
ADD
Operation
RS1 + RS2
RD + IMM16 ⇒ RD (translates to ADDL RD, #IMM16[7:0]; ADDH RD, #IMM16[15:8])
Performs a 16 bit addition and stores the result in the destination register RD.
CCR Effects
Code and CPU Cycles
392
N:
Z:
V:
C:
ADD RD, RS1, RS2
ADD RD, #IMM16
N
∆
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RS1[15] & RS2[15] & RD[15]
Refer to ADDH instruction for #IMM16 operations.
Set if there is a carry from bit 15 of the result; cleared otherwise.
RS1[15] & RS2[15] | RS1[15] & RD[15]
Refer to ADDH instruction for #IMM16 operations.
Z
∆
V
∆
Source Form
⇒ RD
When using immediate addressing mode (ADD RD, #IMM16), the V-flag
and the C-Flag of the first instruction (ADDL RD, #IMM16[7:0]) are not
considered by the second instruction (ADDH RD, #IMM16[15:8]).
⇒ Don’t rely on the V-Flag if RD + IMM16[7:0] ≥ 2
⇒ Don’t rely on the C-Flag if RD + IMM16[7:0] ≥ 2
C
∆
new
MC9S12XE-Family Reference Manual , Rev. 1.23
| RS1[15] & RS2[15] & RD[15]
TRI
IMM8
IMM8
Address
Mode
new
| RS2[15] & RD[15]
Add without Carry
0
1
1
NOTE
0
1
1
0
1
1
1
0
0
new
new
1
0
1
Machine Code
RD
RD
RD
15
16
.
.
RS1
IMM16[15:8]
IMM16[7:0]
RS2
Freescale Semiconductor
ADD
1
0
Cycles
P
P
P