LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 167

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

1. Read: Anytime.

Freescale Semiconductor

Address 0x027E

Address 0x027F

Write: Anytime.

Port AD1 pull device enable—Enable pull devices on input pins

These bits conﬁgure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect

if the pin is used as an output. Out of reset no pull device is enabled.

1 Pull device enabled.

0 Pull device disabled.

Port AD1 pull device enable—Enable pull devices on input pins

These bits conﬁgure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect

if the pin is used as an output. Out of reset no pull device is enabled.

1 Pull device enabled.

0 Pull device disabled.

Port AD1 Pull Up Enable Register 0 (PER0AD1)

Port AD1 Pull Up Enable Register 1 (PER1AD1)

Figure 2-81. Port AD1 Pull Device Up Register 0 (PER0AD1)

Figure 2-82. Port AD1 Pull Up Enable Register 1 (PER1AD1)

Table 2-79. PER0AD1 Register Field Descriptions

Table 2-80. PER1AD1 Register Field Descriptions

MC9S12XE-Family Reference Manual , Rev. 1.23

Chapter 2 Port Integration Module (S12XEPIMV1)

Access: User read/write