LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 624

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
1. Read: Anytime
16.3.2.9
The CANTARQ register allows abort request of queued messages as described below.
1. Read: Anytime
624
Module Base + 0x0008
ABTRQ[2:0]
TXEIE[2:0]
Write: Anytime when not in initialization mode
Write: Anytime when not in initialization mode
Field
Field
2-0
2-0
Reset:
W
R
Transmitter Empty Interrupt Enable
0 No interrupt request is generated from this event.
1 A transmitter empty (transmit buffer available for transmission) event causes a transmitter empty interrupt
Abort Request — The CPU sets the ABTRQx bit to request that a scheduled message buffer (TXEx = 0) be
aborted. The MSCAN grants the request if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a message is aborted, the associated TXE (see
Section 16.3.2.7, “MSCAN Transmitter Flag Register
Section 16.3.2.10, “MSCAN Transmitter Message Abort Acknowledge Register
transmit interrupt occurs if enabled. The CPU cannot reset ABTRQx. ABTRQx is reset whenever the associated
TXE flag is set.
0 No abort request
1 Abort request pending
Figure 16-12. MSCAN Transmitter Message Abort Request Register (CANTARQ)
MSCAN Transmitter Message Abort Request Register (CANTARQ)
request.
The CANTIER register is held in the reset state when the initialization mode
is active (INITRQ = 1 and INITAK = 1). This register is writable when not
in initialization mode (INITRQ = 0 and INITAK = 0).
The CANTARQ register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
7
= Unimplemented
Table 16-15. CANTARQ Register Field Descriptions
Table 16-14. CANTIER Register Field Descriptions
6
0
0
MC9S12XE-Family Reference Manual , Rev. 1.23
0
0
5
NOTE
NOTE
4
0
0
Description
Description
(CANTFLG)”) and abort acknowledge flags (ABTAK, see
0
0
3
ABTRQ2
2
0
(CANTAAK)”) are set and a
Access: User read/write
ABTRQ1
Freescale Semiconductor
0
1
ABTRQ0
0
0
(1)