LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 723

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1)

The PWM module has only one interrupt which is generated at the time of emergency shutdown, if the

corresponding enable bit (PWMIE) is set. This bit is the enable for the interrupt. The interrupt ﬂag PWMIF

is set whenever the input level of the PWM7 channel changes while PWM7ENA = 1 or when PWMENA

is being asserted while the level at PWM7 is active.

In stop mode or wait mode (with the PSWAI bit set), the emergency shutdown feature will drive the PWM

outputs to their shutdown output levels but the PWMIF ﬂag will not be set.

A description of the registers involved and affected due to this interrupt is explained in

Section 19.3.2.15,

“PWM Shutdown Register

The PWM block only generates the interrupt and does not service it. The interrupt signal name is PWM

interrupt signal.

MC9S12XE-Family Reference Manual Rev. 1.23

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