LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 530

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
14.1.2
530
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Four 8-bit pulse accumulators with 8-bit buffer registers associated with the four buffered IC
channels. Configurable also as two 16-bit pulse accumulators.
16-bit modulus down-counter with 8-bit prescaler.
Four user-selectable delay counters for input noise immunity increase.
Stop — Timer and modulus counter are off since clocks are stopped.
Freeze — Timer and modulus counter keep on running, unless the TSFRZ bit in the TSCR1 register
is set to one.
Wait — Counters keep on running, unless the TSWAI bit in the TSCR1 register is set to one.
Normal — Timer and modulus counter keep on running, unless the TEN bit in the TSCR1 register
or the MCEN bit in the MCCTL register are cleared.
Modes of Operation
MC9S12XE-Family Reference Manual Rev. 1.23
Freescale Semiconductor

Related parts for LFEBS12UB