LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 705

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.3.2.7
This register is reserved for factory testing of the PWM module and is not available in normal modes.
Read: Always read $00 in normal modes
Write: Unimplemented in normal modes
19.3.2.8
This register is reserved for factory testing of the PWM module and is not available in normal modes.
Read: Always read $00 in normal modes
Freescale Semiconductor
Module Base + 0x0006
Module Base + 0x0007
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
PSWAI
PFREZ
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
3
2
W
W
R
R
PWM Stops in Wait Mode — Enabling this bit allows for lower power consumption in wait mode by disabling
the input clock to the prescaler.
0 Allow the clock to the prescaler to continue while in wait mode.
1 Stop the input clock to the prescaler whenever the MCU is in wait mode.
PWM Counters Stop in Freeze Mode — In freeze mode, there is an option to disable the input clock to the
prescaler by setting the PFRZ bit in the PWMCTL register. If this bit is set, whenever the MCU is in freeze mode,
the input clock to the prescaler is disabled. This feature is useful during emulation as it allows the PWM function
to be suspended. In this way, the counters of the PWM can be stopped while in freeze mode so that once normal
program flow is continued, the counters are re-enabled to simulate real-time operations. Since the registers can
still be accessed in this mode, to re-enable the prescaler clock, either disable the PFRZ bit or exit freeze mode.
0 Allow PWM to continue while in freeze mode.
1 Disable PWM input clock to the prescaler whenever the part is in freeze mode. This is useful for emulation.
Reserved Register (PWMTST)
Reserved Register (PWMPRSC)
0
0
0
0
7
7
Writing to this register when in special modes can alter the PWM
functionality.
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 19-10. Reserved Register (PWMPRSC)
MC9S12XE-Family Reference Manual Rev. 1.23
Figure 19-9. Reserved Register (PWMTST)
5
0
0
5
0
0
NOTE
0
0
0
0
4
4
Description
0
0
0
0
3
3
Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1)
2
0
0
2
0
0
0
0
0
0
1
1
0
0
0
0
0
0
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