LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 703

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.3.2.5
The PWMCAE register contains eight control bits for the selection of center aligned outputs or left aligned
outputs for each PWM channel. If the CAEx bit is set to a one, the corresponding PWM output will be
center aligned. If the CAEx bit is cleared, the corresponding PWM output will be left aligned. See
Section 19.4.2.5, “Left Aligned Outputs”
detailed description of the PWM output modes.
Read: Anytime
Write: Anytime
19.3.2.6
The PWMCTL register provides for various control of the PWM module.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0004
Module Base + 0x0005
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
CAE[7:0]
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
7–0
W
W
R
R
CON67
CAE7
Center Aligned Output Modes on Channels 7–0
0 Channels 7–0 operate in left aligned output mode.
1 Channels 7–0 operate in center aligned output mode.
PWM Center Align Enable Register (PWMCAE)
PWM Control Register (PWMCTL)
0
0
7
7
Write these bits only when the corresponding channel is disabled.
= Unimplemented or Reserved
CON45
Figure 19-7. PWM Center Align Enable Register (PWMCAE)
CAE6
PCKA2
0
0
6
6
Table 19-3. Clock A Prescaler Selects (continued)
1
Figure 19-8. PWM Control Register (PWMCTL)
MC9S12XE-Family Reference Manual Rev. 1.23
CON23
CAE5
PCKA1
5
0
5
0
1
and
Section 19.4.2.6, “Center Aligned Outputs”
CON01
CAE4
NOTE
0
0
PCKA0
4
4
1
Description
PSWAI
CAE3
0
0
3
3
Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1)
Value of Clock A
Bus clock / 128
CAE2
PFRZ
2
0
2
0
CAE1
0
0
0
1
1
for a more
CAE0
0
0
0
0
0
703