LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 765

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

This section lists the name and description of all ports including inputs and outputs that do, or may, connect

off chip. The SPI module has a total of four external pins.

This pin is used to transmit data out of the SPI module when it is conﬁgured as a master and receive data

when it is conﬁgured as slave.

This pin is used to transmit data out of the SPI module when it is conﬁgured as a slave and receive data

when it is conﬁgured as master.

Freescale Semiconductor

Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers

indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010

External Signal Description

MOSI — Master Out/Slave In Pin

MISO — Master In/Slave Out Pin

SPI Baud Rate Register

SPI Control Register 1

SPI Control Register 2

Baud Rate Generator

SPI Status Register

SPI Data Register

Interrupt Control

Clock Select

MC9S12XE-Family Reference Manual Rev. 1.23

Figure 21-1. SPI Block Diagram

Master Baud Rate

Slave Baud Rate

Chapter 21 Serial Peripheral Interface (S12SPIV5)