LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 245

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 5
External Bus Interface (S12XEBIV4)
5.1
This document describes the functionality of the XEBI block controlling the external bus interface.
The XEBI controls the functionality of a non-multiplexed external bus (a.k.a. ‘expansion bus’) in
relationship with the chip operation modes. Dependent on the mode, the external bus can be used for data
exchange with external memory, peripherals or PRU, and provide visibility to the internal bus externally
in combination with an emulator.
Freescale Semiconductor
Revision
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Number
V04.01
V04.02
V04.03
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Introduction
Revision Date
12 Sep 2005
23 May 2006
24 Jul 2006
Sections
Affected
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 5-1. Revision History
- Added CSx stretch description.
- Internal updates
- Removed term IVIS
Description of Changes
245

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